1. Field of the Invention
The present invention relates to an electronic device and a holding member. More particularly, the present invention relates to an electronic device in which a semiconductor circuit is formed.
2. Description of the Related Art
In recent years, the number of terminals of an LSI has dramatically increased with increase of the degree of integration and increase of functions in the LSI, and therefore the space between the terminals of the LSI becomes narrower. An apparatus that performs positioning of the LSI in accordance with image processing techniques is conventionally known. This apparatus detects the position of the LSI based on an image of the LSI captured by illuminating the LSI with light from an external light source.
In some cases, however, the positions of the LSI cannot be detected appropriately because of unevenness in the light reflected from the LSI based on the difference of shape between the LSIs. For example, in a case of an LSI including BGA (Ball Grid Array) terminals that are arranged with a narrow pitch, the difference between the shapes of the respective terminals is large. Thus, the direction and intensity of the reflected light may be uneven.
Japanese Patent Application Laying-Open No. 3-289700 discloses a method in which an alignment mark is applied onto a substrate or the like. Japanese Patent Application Laying-Open No. 4-102339 discloses another method in which a solder bump is used as the alignment mark. Moreover, Japanese Patent Application Laying-Open No. 10-332345 discloses a method in which an image of the alignment mark is captured and is then subjected to image processing. Furthermore, U.S. Pat. No. 6,097,748 discloses a method in which a CMOS circuit is formed in a polysilicon layer on a GaAs substrate.